1. Field of the Invention
The present invention relates generally to RMS-DC converters, and more particularly, to RMS-DC converters which utilize gain stages and variable weighting coefficients to provide a very wide measurement range.
2. Description of the Related Art
RMS-DC converters are used to convert the RMS (root-mean-square) value of an arbitrary signal into a quasi-DC signal that represents the true power level of the signal. Various techniques have been devised for performing RMS-to-DC conversions at frequencies ranging from DC to several GHz, some of which are disclosed in co-pending U.S. patent application Ser. Nos. 09/245,051 filed Feb. 4, 1999 and 09/256,640 filed Feb. 24, 1999 which are by the same inventor as the present application, and are incorporated herein by reference.
Performing accurate RMS-DC conversions over a wide dynamic range has proven difficult, especially at RF frequencies of several GHz. The need for wide dynamic range true-power measurement at very high frequencies has become more critical because the signals generated by modern communications systems such as those using CDMA have very wide instantaneous bandwidth and complex waveforms, with high crest factors, and because operating frequencies are continuously being pushed higher.
Logarithmic amplifiers (log amps) are often used to measure the power of RF signals because they can provide a good indication of power over a very wide bandwidth, but the measurement depends on the waveform of the RF signal. Synchronous log amps are of special interest in this regard because they reduce the noise floor compared to other log amps, and therefore, provide extended dynamic range. A synchronous log amp is disclosed in U.S. Pat. No. 5,298,811 which issued to the inventor of the present application and which is incorporated by reference.
However, logarithmic amplifiers, including synchronous log amps, do not provide an RMS response. When a signal of substantial amplitude is applied to a log amp, most of the amplifier cells operate in a limiting mode which precludes the attainment of a square-law response in the constituent detector cells, or in the sum of their outputs.
In one aspect of the present invention, a series of cascaded gain stages generate a series of progressively amplified signals which are squared and weighted and then summed to provide a true square-law response. In another aspect of the present invention, two parallel series of cascaded gain stages generate a series of progressively amplified signal pairs which are multiplied and weighted and then summed to provide a true square-law response while also canceling uncorrelated noise. In a further aspect of the present invention, two signals are generated by exponential signal generators responsive to an input signal, and combined to provide an output signal which approximates the squared value of the input signal. In another aspect of the present invention, four signals are generated by exponential signal generators responsive to two input signals, and combined to provide an output signal which approximates the multiplication of the input signals. In an additional aspect of the present invention, an exponential signal is generated responsive to an input signal by maintaining a constant current in a first pair of series-connected junctions, thereby generating a first voltage across the first pair of junctions; and driving a second pair of series-connected junctions with a voltage equal to the first voltage minus the voltage of the signal.